6510: The C64's Custom Core
A 6502 with an I/O trick up its sleeve
The MOS 6510 added an integrated I/O port to the 6502, giving the Commodore 64 its signature memory banking and tape control.
Overview
The MOS 6510 is essentially a 6502 with an integrated I/O port at addresses $00 and $01. This seemingly minor addition gave the Commodore 64 its flexible memory mapping, allowing programmers to swap ROM in and out of the address space and control the datasette.
The port's data and direction registers are both 8 bits wide internally, but the standard C64 6510 mask only bonds out P0–P5. Bits 6 and 7 still exist in the registers; they just drive no external pin. Late variants (6510-1, 6510-2) bond out additional pins.
Fast facts
- Clock speed: 0.985 MHz (PAL) / 1.023 MHz (NTSC).
- Compatibility: 100% instruction-compatible with 6502.
- I/O port: 8-bit registers at $00 (data direction) and $01 (data); 6 bits (P0–P5) bonded out on standard C64 mask.
- Pin count: 40-pin DIP package.
The I/O port
The magic lives at two special addresses:
| Address | Function |
|---|---|
| $00 | Data Direction Register (DDR) - 1=output, 0=input |
| $01 | Port data - controls memory mapping and tape |
Port bit assignments
| Bit | Function |
|---|---|
| 0 | LORAM - BASIC ROM visibility |
| 1 | HIRAM - KERNAL ROM visibility |
| 2 | CHAREN - Character ROM / I/O visibility |
| 3 | Cassette write line |
| 4 | Cassette sense (input) |
| 5 | Cassette motor control |
Memory banking
By manipulating bits 0-2 of $01, programmers can:
- Hide BASIC ROM: gain 8KB at $A000-$BFFF for machine code.
- Hide KERNAL ROM: gain 8KB at $E000-$FFFF (requires custom IRQ handling).
- Access character ROM: read font data at $D000-$DFFF instead of I/O.
- Full 64KB RAM: set all three bits low for complete RAM access.
Common configurations
| $01 value | Configuration |
|---|---|
| $37 | Default: BASIC + KERNAL + I/O visible |
| $36 | BASIC hidden, KERNAL + I/O visible |
| $35 | KERNAL hidden, BASIC + I/O visible |
| $34 | BASIC + KERNAL hidden, $D000-$DFFF = RAM (LORAM=HIRAM=0 forces RAM at $D000, overriding CHAREN) |
| $30 | All RAM visible (64KB) |
Why it matters
The 6510's I/O port let the C64 punch above its weight. Games could claim the full 64KB while still using ROM routines when convenient. This flexibility, combined with the VIC-II and SID, made the C64 the dominant gaming platform of the 8-bit era.
Capacitor decay quirk
A famous emulation gotcha: bits 6 and 7 (and any other bit lacking an external pull-up) exhibit charge decay. Drive a bit low (DDR=1, PORT bit=0), then switch it to input (DDR=0). The bit reads 0 briefly, then drifts to 1 over roughly 350 ms at room temperature as the gate-input capacitance leaks. Software that depends on this behaviour will misbehave in emulators that treat the bit as a plain register. Cycle-accurate emulators track a per-bit "last-driven value and timestamp" and time out reads to 1 after the decay window.