Motorola 6809
The finest 8-bit CPU
The 1978 Motorola processor widely considered the best 8-bit CPU ever designed, featuring clean orthogonal architecture, 16-bit operations, and position-independent code support.
The Motorola 6809 is widely considered the finest 8-bit CPU ever designed. Released in 1978, it featured clean orthogonal architecture, native 16-bit operations via the D register, two stack pointers, and support for position-independent code—revolutionary features that made it feel like a 16-bit processor.
Answering the 6502, point by point
Motorola’s manual reads, in places, like a list of things the 6502 could not do.
Zero page that moves. The 6502’s fast addressing mode is nailed to the first 256 bytes of memory; on machines where the ROM had already claimed most of it, that was the tightest constraint a programmer faced. The 6809 makes the same idea relocatable:
A direct page register has been added which allows a 256 byte “direct” page anywhere in the 64K logical address space. The direct page register is used to hold the most-significant byte of the address used in direct addressing and decrease the time required for address calculation.
The 6502 saves its cycle by knowing the high byte is zero. The 6809 saves the same cycle by keeping the high byte in a register — so every task, interrupt handler or module can have its own fast page and switch between them with one write.
Multiplication in hardware. The 6502 has none; every multiply is a software
loop. The 6809 lists MUL among the enhancements that “simplify software
design”, an unsigned 8×8 product landing in the 16-bit D accumulator.
Two stacks instead of one. The 6502 has a single 256-byte stack in page one
and cannot move it. The 6809 has a hardware stack S and a user stack U, both
full 16-bit pointers, with push and pull instructions that take a register mask:
“all, some, or none of the processor registers are pushed onto the user stack
(with the exception of the user stack pointer itself)”. One stack for return
addresses and one for parameters, and the choice of exactly which registers to
save.
Written to be moved
The manual devotes a section to a goal most 8-bit documentation does not raise at all:
Position-independent code means that the same machine language code can be placed anywhere in memory and still function correctly.
The 6809 supplies three things for it: a long relative branch reaching the whole
address space, program-counter relative addressing that “uses the program counter
like an indexable register, which allows all instructions that reference memory to
also reference data relative to the program counter”, and LEA instructions
“which allow the user to point to data in a ROM in a position-independent manner”.
The idiom Motorola shows is LEAX MSG1,PCR — load the address of a message
computed from wherever the program happens to be running. And the rule is stated
in capitals: “NEVER USE ABSOLUTE ADDRESSING.”
Motorola is also honest about the price, which is the sort of number documentation usually omits: position-independent code “is usually 5 to 10% slower than normal code”.
This is a processor designed on the assumption that software would be relocated, shared and ROM-resident — closer in spirit to an operating system’s requirements than to a games machine’s. It is also why the 6809 reads as the most modern of the 8-bit designs, and part of why it was the more expensive choice.
Fast facts
- Released: 1978
- Clock: 1-2 MHz typical
- Architecture: 8-bit with 16-bit operations
- Registers: A, B, D (A+B), X, Y, U, S, DP, CC, PC
- Endianness: Big-endian (high byte first in memory) — opposite of the 6502
- Addressing: Orthogonal, PC-relative supported
- Hardware multiply: Yes (
MUL: A × B → D, 8×8 → 16-bit unsigned)
Variants
| Chip | Clock | Use |
|---|---|---|
| MC6809 | Internal oscillator (XTAL/EXTAL pins) | Generates its own E and Q clocks on-chip |
| MC6809E | External clock (E and Q inputs driven externally) | Required when the CPU must be synchronised to video hardware or another bus master — used in the Dragon 32/64 so the MC6883 SAM can interleave CPU and MC6847 VDG accesses against video timing |
The two parts are otherwise programmer-visible identical.
Register Set
| Register | Size | Purpose |
|---|---|---|
| A, B | 8-bit | Accumulators |
| D | 16-bit | Combined A:B (A is high byte) |
| X, Y | 16-bit | Index registers |
| U, S | 16-bit | User and System stack pointers |
| DP | 8-bit | Direct page (high byte for direct addressing) |
| CC | 8-bit | Condition codes (E F H I N Z V C) |
| PC | 16-bit | Program counter |
Key features
| Feature | Significance |
|---|---|
| D register | Native 16-bit arithmetic on combined A:B |
| Hardware multiply | MUL does A × B → D in a single instruction |
| Two stacks | Independent S (system) and U (user) pointers — elegant subroutine handling, parameter passing |
| PC-relative addressing | Position-independent code via LBRA, LEAX target,PCR, etc. — compiled binaries can be loaded anywhere |
| Orthogonal | All addressing modes work with most instructions |
| Two interrupt levels | IRQ (saves all registers, slow) and FIRQ (saves only PC and CC, fast). The E flag in CC indicates which kind on entry to the handler |
| SYNC and CWAI | Halt-until-interrupt instructions for low-power idle and interrupt-driven code |
vs Other 8-bit CPUs
| Aspect | 6502 | Z80 | 6809 |
|---|---|---|---|
| 16-bit ops | Limited | Some | Extensive |
| Stack | 8-bit, one | 16-bit, one | 16-bit, two |
| Design | Quirky | Complex | Clean |
Systems Using 6809
- Dragon 32/64 (uses 6809E variant)
- TRS-80 Color Computer (CoCo 1/2/3)
- Vectrex
- Williams arcade — Defender, Stargate, Joust, Robotron 2084, Sinistar. Williams’ graphics-heavy gameplay leaned hard on the 6809’s 16-bit operations and hardware multiply for software sprite rendering and physics.
- Some Konami arcade boards (e.g. Time Pilot) and Atari System 1 sound CPUs
Position-independent code
The 6809’s PC-relative addressing makes truly relocatable code straightforward:
LDA value,PCR ; read from "value" relative to PC, no fixup needed
LBRA handler ; long branch to "handler" relative to PC
LEAX table,PCR ; load X with the PC-relative address of "table"Code assembled this way runs at any load address without relocation — useful for ROM cartridges, dynamically loaded modules, and overlays. This was a decade ahead of most 8-bit CPUs.
Legacy
The 6809 was technically superior to contemporary 8-bit CPUs but lost on economics—it cost more than the 6502 and arrived after those platforms dominated. Its clean design influenced later processors and remains beloved by assembly programmers.