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Hardware

Motorola 6809

The finest 8-bit CPU

The 1978 Motorola processor widely considered the best 8-bit CPU ever designed, featuring clean orthogonal architecture, 16-bit operations, and position-independent code support.

dragon-32tandy-cocoVectrex cpumotorola8-bit6809processor 1978–present

Overview

The Motorola 6809 is widely considered the finest 8-bit CPU ever designed. Released in 1978, it featured clean orthogonal architecture, native 16-bit operations via the D register, two stack pointers, and support for position-independent code—revolutionary features that made it feel like a 16-bit processor.

Fast Facts

  • Released: 1978
  • Clock: 1-2 MHz typical
  • Architecture: 8-bit with 16-bit operations
  • Registers: A, B, D (A+B), X, Y, U, S, DP, CC, PC
  • Endianness: Big-endian (high byte first in memory) — opposite of the 6502
  • Addressing: Orthogonal, PC-relative supported
  • Hardware multiply: Yes (MUL: A × B → D, 8×8 → 16-bit unsigned)

Variants

ChipClockUse
MC6809Internal oscillator (XTAL/EXTAL pins)Generates its own E and Q clocks on-chip
MC6809EExternal clock (E and Q inputs driven externally)Required when the CPU must be synchronised to video hardware or another bus master — used in the Dragon 32/64 so the MC6883 SAM can interleave CPU and MC6847 VDG accesses against video timing

The two parts are otherwise programmer-visible identical.

Register Set

RegisterSizePurpose
A, B8-bitAccumulators
D16-bitCombined A:B (A is high byte)
X, Y16-bitIndex registers
U, S16-bitUser and System stack pointers
DP8-bitDirect page (high byte for direct addressing)
CC8-bitCondition codes (E F H I N Z V C)
PC16-bitProgram counter

Key Features

FeatureSignificance
D registerNative 16-bit arithmetic on combined A:B
Hardware multiplyMUL does A × B → D in a single instruction
Two stacksIndependent S (system) and U (user) pointers — elegant subroutine handling, parameter passing
PC-relative addressingPosition-independent code via LBRA, LEAX target,PCR, etc. — compiled binaries can be loaded anywhere
OrthogonalAll addressing modes work with most instructions
Two interrupt levelsIRQ (saves all registers, slow) and FIRQ (saves only PC and CC, fast). The E flag in CC indicates which kind on entry to the handler
SYNC and CWAIHalt-until-interrupt instructions for low-power idle and interrupt-driven code

vs Other 8-bit CPUs

Aspect6502Z806809
16-bit opsLimitedSomeExtensive
Stack8-bit, one16-bit, one16-bit, two
DesignQuirkyComplexClean

Systems Using 6809

  • Dragon 32/64 (uses 6809E variant)
  • TRS-80 Color Computer (CoCo 1/2/3)
  • Vectrex
  • Williams arcade — Defender, Stargate, Joust, Robotron 2084, Sinistar. Williams' graphics-heavy gameplay leaned hard on the 6809's 16-bit operations and hardware multiply for software sprite rendering and physics.
  • Some Konami arcade boards (e.g. Time Pilot) and Atari System 1 sound CPUs

Position-independent code

The 6809's PC-relative addressing makes truly relocatable code straightforward:

        LDA     value,PCR    ; read from "value" relative to PC, no fixup needed
        LBRA    handler      ; long branch to "handler" relative to PC
        LEAX    table,PCR    ; load X with the PC-relative address of "table"

Code assembled this way runs at any load address without relocation — useful for ROM cartridges, dynamically loaded modules, and overlays. This was a decade ahead of most 8-bit CPUs.

Legacy

The 6809 was technically superior to contemporary 8-bit CPUs but lost on economics—it cost more than the 6502 and arrived after those platforms dominated. Its clean design influenced later processors and remains beloved by assembly programmers.

See Also