The half adder produces a carry and cannot accept one. A higher column may receive a carry, so we need a third input. For an ordinary sum of two numbers, we start the rightmost column with carry in 0. A full adder can accept a different starting carry when the operation calls for it.
Call it carry in. Three inputs now: A, B and the carry arriving from the column to
the right.
Three inputs, eight rows
Three questions make eight cases, as Truth Tables promised. Here is the whole behaviour:
| A | B | Cin | SUM | COUT |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Two things to notice in that grid.
The sum column is on whenever an odd number of inputs are on. One, or all three. That is
XOR again, applied to three wires instead of two.
The carry column is on whenever at least two inputs are on. A carry happens when the column overflows, and with three bits arriving it overflows the moment any two of them are 1.
For every row, check the same relationship:
A + B + Cin = SUM + 2 * COUTWith all three inputs 1, the left side is 3 and the right is 1 + 2 × 1 = 3. The two output bits retain the whole answer for this column.
Building it
Take it in two steps, because a full adder is two half adders with their carries collected.
First add A and B, exactly as before. Then add the carry in to that result. Each of those
additions can throw a carry, and either one is enough to carry into the next column, so an
OR collects them.
Click an input to turn it on or off, and watch the wires.
| A | B | Cin | SUM | COUT |
|---|---|---|---|---|
| 0 | 0 | 0 | 0 | 0 |
| 0 | 0 | 1 | 1 | 0 |
| 0 | 1 | 0 | 1 | 0 |
| 0 | 1 | 1 | 0 | 1 |
| 1 | 0 | 0 | 1 | 0 |
| 1 | 0 | 1 | 0 | 1 |
| 1 | 1 | 0 | 0 | 1 |
| 1 | 1 | 1 | 1 | 1 |
Five gates. Set all three inputs on and trace it: the first XOR goes dark because both its
inputs are lit, the second XOR sees that 0 against the carry in and lights the sum, and the
first AND lights the carry out.
Chaining them
One full adder handles one column. To add whole numbers, use one per bit and hand each carry out to the next adder’s carry in.
Each box stands for the five-gate construction above. The overview shows the connections; its displayed values start at zero and are not interactive. The full-adder controls above let you test one column.
This is a ripple-carry adder, and the name describes what happens. A carry out of the rightmost column becomes the carry in of the next, which may produce a carry of its own, and so on leftwards. The carry ripples along the chain.
Follow a carry through three columns
Add binary 111 and 001: seven plus one. Start on the right, at bit 0,
with no incoming carry.
| Bit position | A | B | Carry in | Sum bit | Carry out |
|---|---|---|---|---|---|
| 0 (ones) | 1 | 1 | 0 | 0 | 1 |
| 1 (twos) | 1 | 0 | 1 | 0 | 1 |
| 2 (fours) | 1 | 0 | 1 | 0 | 1 |
The carry from each row becomes the next row’s carry in. Read the three sum bits in the opposite order, S2 S1 S0: 000. Keep the last carry on their left and the full result is 1000, or eight.
Nothing forces us to discard that carry. If we choose a three-bit result field, we keep 000 there and must decide what to do with the extra 1. Keeping it separately preserves the full unsigned result.
Does 111 + 001 give zero or eight? What if we keep only three sum bits?
The full unsigned answer is eight, binary 1000. The low three sum bits are 000, and the final carry is 1. Keeping only those low bits gives zero in a three-bit field; it does not change the full arithmetic answer.
What this cost
In this construction, a half adder uses two logical gates and a full adder uses five. Repeating that full-adder construction eight times uses 40 logical gate instances. This is a count of our diagram, not a count of a processor’s transistors or a guarantee of its internal adder design.
The Boolean model also leaves out physical settling time. A real ripple path has to meet its timing requirements; instant changes on this page do not measure its speed. A processor contains stored state and control as well as arithmetic. We have explained one useful part, not every layer of the machine.
When it’s wrong, see why
- The last carry disappeared. Check the chosen output width and whether the carry is kept separately. Discarding it is a storage choice, not a requirement of the adder.
- A sum bit is wrong further left than where you looked. Check the carry chain. A wrong carry can affect higher columns, but it need not reach every one. With A = B = 0, an incoming 1 changes that column’s sum to 1 but its next carry is 0. Find the lowest differing column, then trace onwards.
- You wired the carry into the wrong end. Carries travel from the small end to the big end, the same direction you carry on paper.
What you’ve learnt
- A full adder takes two operand bits and an incoming carry bit.
- Its sum is
XORof all three, and its carry is on when at least two inputs are. - Our five-gate construction uses two half adders and an
ORfor their carries. - Chaining one per bit gives a ripple-carry adder, where the carry travels along the chain.
- Keeping the final carry preserves a wider answer; discarding it keeps only low bits.
Where this leaves you
You can now trace a Boolean adder from individual input combinations to a multi-column result. A real processor implements arithmetic within a larger system of registers, control and timed signals. Its specification tells us which results and flags an instruction makes available.
Counting in Twos: A Minus With No Minus Sign distinguishes carry from signed overflow on the Z80. Read its comparison table without needing to learn assembly first.
Meet Assembly starts an independent route into a real machine. Return here when an arithmetic operation gives you a reason to inspect the model beneath it.