A sound can swell, settle and fade instead of switching between full volume and silence.

Use it in a project
LEVEL is 0–15; PHASE is 0 off, 1 attack, 2 decay, 3 sustain or 4 release. ATTACK, DECAY and RELEASE are per-service steps 1–15; SUSTAIN is 0–15. A rising GATE restarts from zero. A low gate sends any active phase to release. Return a clamped logical level and VALID=1; invalid parameters or state return VALID=0 without changing envelope state.
Include component.inc once (MOS callers include the shared 6502 implementation through it). Reserve the public fields in this exact order: LEVEL, PHASE, PREVIOUS, VALID, GATE, ATTACK, DECAY, SUSTAIN, RELEASE. They occupy 9 contiguous bytes. Also reserve the private workspace: T0 (1 bytes). Array names in the explanation refer to the numbered consecutive bindings, such as C0, C1 and so on.
Call logical_envelope_init once at the intended reset boundary. It clears inputs as well as outputs and workspace. Set your starting state and configuration afterwards, then call logical_envelope_step whenever the described event occurs. The helper reads no device, waits for no frame and installs no interrupt handler.
| Ownership | Fields |
|---|---|
| Retain between calls | LEVEL, PHASE and PREVIOUS |
| Supply before service | GATE, ATTACK, DECAY, SUSTAIN and RELEASE |
| Read after service | LEVEL, PHASE and VALID |
Gate edges choose a phase; each phase moves towards its own bound. Clamp before changing phase so a large step cannot wrap below silence or past the peak.
Reusable initialisation and service
; SPDX-License-Identifier: MIT
; Service a Logical Attack–Decay–Sustain–Release Envelope. See README.md for the byte interface and ownership.
; init clears the public fields and private workspace; set inputs afterwards.
logical_envelope_init:
lda #0
sta LEVEL
sta PHASE
sta PREVIOUS
sta VALID
sta GATE
sta ATTACK
sta DECAY
sta SUSTAIN
sta RELEASE
sta T0
rts
logical_envelope_step:
; VALID = 0
lda #0
sta VALID
; if LEVEL > 15:
lda LEVEL
cmp #15
beq logical_envelope_L5
bcs logical_envelope_L4
logical_envelope_L5:
jmp logical_envelope_L2
logical_envelope_L4:
jmp logical_envelope_L1
logical_envelope_L1:
; return
rts
jmp logical_envelope_L3
logical_envelope_L2:
logical_envelope_L3:
; if PHASE > 4:
lda PHASE
cmp #4
beq logical_envelope_L10
bcs logical_envelope_L9
logical_envelope_L10:
jmp logical_envelope_L7
logical_envelope_L9:
jmp logical_envelope_L6
logical_envelope_L6:
; return
rts
jmp logical_envelope_L8
logical_envelope_L7:
logical_envelope_L8:
; if ATTACK == 0:
lda ATTACK
cmp #0
beq logical_envelope_L14
logical_envelope_L15:
jmp logical_envelope_L12
logical_envelope_L14:
jmp logical_envelope_L11
logical_envelope_L11:
; return
rts
jmp logical_envelope_L13
logical_envelope_L12:
logical_envelope_L13:
; if ATTACK > 15:
lda ATTACK
cmp #15
beq logical_envelope_L20
bcs logical_envelope_L19
logical_envelope_L20:
jmp logical_envelope_L17
logical_envelope_L19:
jmp logical_envelope_L16
logical_envelope_L16:
; return
rts
jmp logical_envelope_L18
logical_envelope_L17:
logical_envelope_L18:
; if DECAY == 0:
lda DECAY
cmp #0
beq logical_envelope_L24
logical_envelope_L25:
jmp logical_envelope_L22
logical_envelope_L24:
jmp logical_envelope_L21
logical_envelope_L21:
; return
rts
jmp logical_envelope_L23
logical_envelope_L22:
logical_envelope_L23:
; if DECAY > 15:
lda DECAY
cmp #15
beq logical_envelope_L30
bcs logical_envelope_L29
logical_envelope_L30:
jmp logical_envelope_L27
logical_envelope_L29:
jmp logical_envelope_L26
logical_envelope_L26:
; return
rts
jmp logical_envelope_L28
logical_envelope_L27:
logical_envelope_L28:
; if RELEASE == 0:
lda RELEASE
cmp #0
beq logical_envelope_L34
logical_envelope_L35:
jmp logical_envelope_L32
logical_envelope_L34:
jmp logical_envelope_L31
logical_envelope_L31:
; return
rts
jmp logical_envelope_L33
logical_envelope_L32:
logical_envelope_L33:
; if RELEASE > 15:
lda RELEASE
cmp #15
beq logical_envelope_L40
bcs logical_envelope_L39
logical_envelope_L40:
jmp logical_envelope_L37
logical_envelope_L39:
jmp logical_envelope_L36
logical_envelope_L36:
; return
rts
jmp logical_envelope_L38
logical_envelope_L37:
logical_envelope_L38:
; if SUSTAIN > 15:
lda SUSTAIN
cmp #15
beq logical_envelope_L45
bcs logical_envelope_L44
logical_envelope_L45:
jmp logical_envelope_L42
logical_envelope_L44:
jmp logical_envelope_L41
logical_envelope_L41:
; return
rts
jmp logical_envelope_L43
logical_envelope_L42:
logical_envelope_L43:
; VALID = 1
lda #1
sta VALID
; if GATE != 0:
lda GATE
cmp #0
bne logical_envelope_L49
logical_envelope_L50:
jmp logical_envelope_L47
logical_envelope_L49:
jmp logical_envelope_L46
logical_envelope_L46:
; if PREVIOUS == 0:
lda PREVIOUS
cmp #0
beq logical_envelope_L54
logical_envelope_L55:
jmp logical_envelope_L52
logical_envelope_L54:
jmp logical_envelope_L51
logical_envelope_L51:
; LEVEL = 0
lda #0
sta LEVEL
; PHASE = 1
lda #1
sta PHASE
jmp logical_envelope_L53
logical_envelope_L52:
logical_envelope_L53:
; PREVIOUS = 1
lda #1
sta PREVIOUS
jmp logical_envelope_L48
logical_envelope_L47:
; PREVIOUS = 0
lda #0
sta PREVIOUS
; if PHASE != 0:
lda PHASE
cmp #0
bne logical_envelope_L59
logical_envelope_L60:
jmp logical_envelope_L57
logical_envelope_L59:
jmp logical_envelope_L56
logical_envelope_L56:
; PHASE = 4
lda #4
sta PHASE
jmp logical_envelope_L58
logical_envelope_L57:
logical_envelope_L58:
logical_envelope_L48:
; if PHASE == 0:
lda PHASE
cmp #0
beq logical_envelope_L64
logical_envelope_L65:
jmp logical_envelope_L62
logical_envelope_L64:
jmp logical_envelope_L61
logical_envelope_L61:
; LEVEL = 0
lda #0
sta LEVEL
; return
rts
jmp logical_envelope_L63
logical_envelope_L62:
logical_envelope_L63:
; if PHASE == 1:
lda PHASE
cmp #1
beq logical_envelope_L69
logical_envelope_L70:
jmp logical_envelope_L67
logical_envelope_L69:
jmp logical_envelope_L66
logical_envelope_L66:
; T0 = 15 - LEVEL
lda #15
sec
sbc LEVEL
sta T0
; if ATTACK >= T0:
lda ATTACK
cmp T0
bcs logical_envelope_L74
logical_envelope_L75:
jmp logical_envelope_L72
logical_envelope_L74:
jmp logical_envelope_L71
logical_envelope_L71:
; LEVEL = 15
lda #15
sta LEVEL
; PHASE = 2
lda #2
sta PHASE
jmp logical_envelope_L73
logical_envelope_L72:
; LEVEL = LEVEL + ATTACK
lda LEVEL
clc
adc ATTACK
sta LEVEL
logical_envelope_L73:
; return
rts
jmp logical_envelope_L68
logical_envelope_L67:
logical_envelope_L68:
; if PHASE == 2:
lda PHASE
cmp #2
beq logical_envelope_L79
logical_envelope_L80:
jmp logical_envelope_L77
logical_envelope_L79:
jmp logical_envelope_L76
logical_envelope_L76:
; if LEVEL <= SUSTAIN:
lda LEVEL
cmp SUSTAIN
bcc logical_envelope_L84
beq logical_envelope_L84
logical_envelope_L85:
jmp logical_envelope_L82
logical_envelope_L84:
jmp logical_envelope_L81
logical_envelope_L81:
; LEVEL = SUSTAIN
lda SUSTAIN
sta LEVEL
; PHASE = 3
lda #3
sta PHASE
; return
rts
jmp logical_envelope_L83
logical_envelope_L82:
logical_envelope_L83:
; T0 = LEVEL - SUSTAIN
lda LEVEL
sec
sbc SUSTAIN
sta T0
; if DECAY >= T0:
lda DECAY
cmp T0
bcs logical_envelope_L89
logical_envelope_L90:
jmp logical_envelope_L87
logical_envelope_L89:
jmp logical_envelope_L86
logical_envelope_L86:
; LEVEL = SUSTAIN
lda SUSTAIN
sta LEVEL
; PHASE = 3
lda #3
sta PHASE
jmp logical_envelope_L88
logical_envelope_L87:
; LEVEL = LEVEL - DECAY
lda LEVEL
sec
sbc DECAY
sta LEVEL
logical_envelope_L88:
; return
rts
jmp logical_envelope_L78
logical_envelope_L77:
logical_envelope_L78:
; if PHASE == 3:
lda PHASE
cmp #3
beq logical_envelope_L94
logical_envelope_L95:
jmp logical_envelope_L92
logical_envelope_L94:
jmp logical_envelope_L91
logical_envelope_L91:
; LEVEL = SUSTAIN
lda SUSTAIN
sta LEVEL
; return
rts
jmp logical_envelope_L93
logical_envelope_L92:
logical_envelope_L93:
; if RELEASE >= LEVEL:
lda RELEASE
cmp LEVEL
bcs logical_envelope_L99
logical_envelope_L100:
jmp logical_envelope_L97
logical_envelope_L99:
jmp logical_envelope_L96
logical_envelope_L96:
; LEVEL = 0
lda #0
sta LEVEL
; PHASE = 0
lda #0
sta PHASE
jmp logical_envelope_L98
logical_envelope_L97:
; LEVEL = LEVEL - RELEASE
lda LEVEL
sec
sbc RELEASE
sta LEVEL
logical_envelope_L98:
rts
component_end:Machine contract
A/X/status may change; Y is preserved. The 2A03 has no decimal arithmetic mode. A direct JSR needs two return-address stack bytes. The helper makes no nested calls and adds no other stack use. Its named scratch is private workspace, not a pointer, a ROM variable or shared zero-page space that the game may borrow concurrently. The samples use fixed symbol bindings. Scope or rename every label and binding, including the component_end measurement marker, and allocate a separate block for each independent instance. Different helpers can also use common field names, so combining them needs separate namespaces or explicitly renamed bindings. Give each block one mutation owner.
The NROM caller owns PPU setup and background display, with NMI and DMC disabled. Table and packet sizes are bounded to fit the cartridge caller and internal RAM; the helper owns no PPU registers.
Adapt the caller
demo.asm supplies the bindings and include order. exercise.inc first runs table cases, then a separate client retaining state between calls. A game can call the public step entry directly and remove the diagnostic packet and display. Do not copy the diagnostic’s hardware takeover into an existing game loop.
Build with make ASM198X=/path/to/asm198x. The Makefile produces normal, custom, deliberately wrong and repaired programs. Tools must already be installed; the sample downloads nothing.
Bindings and include order
.segment "HEADER"
.byte "NES",$1a,2,1,0,0,0,0,0,0,0,0,0,0
LEVEL=$80
PHASE=$81
PREVIOUS=$82
VALID=$83
GATE=$84
ATTACK=$85
DECAY=$86
SUSTAIN=$87
RELEASE=$88
T0=$89
STATE=$80
input_ptr=$70
cases_left=$72
ptr=$74
saved_y=$76
OUTPUT=$0200
preview=OUTPUT+1400
ready=OUTPUT+1408
CUSTOM=0
BROKEN=0
COYOTE_STEPS=4
BUFFER_STEPS=4
TEXT_CAP=8
PROPERTY_COUNT=16
STREAM_BYTES=13
CRC_POLY=7
.include "caller.inc"
.include "exercise.inc"
component_start:
.include "component.inc"
.include "data.inc"
.include "cases.inc"
code_end:
.segment "VECTORS"
.word nmi,reset,irq
.segment "CHARS"
.include "../../input/controller-reading/edges-font.inc"
.res 8192-272,0A client retaining state between calls
preview_rules:
.if CUSTOM
; GATE = 1
lda #1
sta GATE
; ATTACK = 15
lda #15
sta ATTACK
; DECAY = 4
lda #4
sta DECAY
; SUSTAIN = 4
lda #4
sta SUSTAIN
; RELEASE = 4
lda #4
sta RELEASE
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
; GATE = 0
lda #0
sta GATE
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
rts
.else
; GATE = 1
lda #1
sta GATE
; ATTACK = 3
lda #3
sta ATTACK
; DECAY = 2
lda #2
sta DECAY
; SUSTAIN = 6
lda #6
sta SUSTAIN
; RELEASE = 4
lda #4
sta RELEASE
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.if BROKEN
; PREVIOUS = 0
lda #0
sta PREVIOUS
.endif
jsr checked_step
jsr emit_state
.endif
rtsCustomise it
Use a fast attack and release the note before the default held sequence finishes. The maintained custom caller changes its inputs or client sequence rather than hiding a different implementation behind the same label. Compare every state of the two clients, not only their final display.
Custom client selection
.segment "HEADER"
.byte "NES",$1a,2,1,0,0,0,0,0,0,0,0,0,0
LEVEL=$80
PHASE=$81
PREVIOUS=$82
VALID=$83
GATE=$84
ATTACK=$85
DECAY=$86
SUSTAIN=$87
RELEASE=$88
T0=$89
STATE=$80
input_ptr=$70
cases_left=$72
ptr=$74
saved_y=$76
OUTPUT=$0200
preview=OUTPUT+1400
ready=OUTPUT+1408
CUSTOM=1
BROKEN=0
COYOTE_STEPS=2
BUFFER_STEPS=2
TEXT_CAP=4
PROPERTY_COUNT=16
STREAM_BYTES=13
CRC_POLY=49
.include "caller.inc"
.include "exercise.inc"
component_start:
.include "component.inc"
.include "data.inc"
.include "cases.inc"
code_end:
.segment "VECTORS"
.word nmi,reset,irq
.segment "CHARS"
.include "../../input/controller-reading/edges-font.inc"
.res 8192-272,0The custom diagnostic row is 00 00 00 01 00 0F 04 04. The full client trace in the source explains how it gets there.
Mistake and repair
The wrong caller clears PREVIOUS each service. A held note continually retriggers its attack and never develops the intended shape. Retain the gate edge state independently of note servicing.
The BROKEN branch lives in the sequential client, not the reusable helper. wrong.asm selects it; repaired.asm restores the normal call sequence. The repaired executable matches the normal program (for Spectrum, compare loaded CODE rather than the tape filename).
Select the deliberately wrong client
.segment "HEADER"
.byte "NES",$1a,2,1,0,0,0,0,0,0,0,0,0,0
LEVEL=$80
PHASE=$81
PREVIOUS=$82
VALID=$83
GATE=$84
ATTACK=$85
DECAY=$86
SUSTAIN=$87
RELEASE=$88
T0=$89
STATE=$80
input_ptr=$70
cases_left=$72
ptr=$74
saved_y=$76
OUTPUT=$0200
preview=OUTPUT+1400
ready=OUTPUT+1408
CUSTOM=0
BROKEN=1
COYOTE_STEPS=4
BUFFER_STEPS=4
TEXT_CAP=8
PROPERTY_COUNT=16
STREAM_BYTES=13
CRC_POLY=7
.include "caller.inc"
.include "exercise.inc"
component_start:
.include "component.inc"
.include "data.inc"
.include "cases.inc"
code_end:
.segment "VECTORS"
.word nmi,reset,irq
.segment "CHARS"
.include "../../input/controller-reading/edges-font.inc"
.res 8192-272,0
Cost and alternatives
The measured helper extent is 455 code bytes; public state is 9 bytes and private scratch is 1 bytes. There are no immutable helper tables. Caller data, the test cases, return-address stack, alignment and display buffers cost additional space. These are assembled sizes, not cycle measurements.
Constant work per service. A hardware envelope can save CPU when its behaviour fits the sound. Software envelopes offer a common control shape but need scheduled updates and machine-specific output mapping.
This is a software control envelope with linear steps per service, not an emulation of a chip’s envelope rates or curves. A backend maps LEVEL to an owned voice or mix gain. Do not overwrite shared hardware volume or a hardware-envelope mode without a deliberate audio ownership policy.
Execution evidence
Four variants run on NTSC NROM, background only, DMC/NMI disabled, using Asm198x 0.0.72, Emu198x 0.44.2. Each executes 64 boundary/varied/error table cases, dirty initialisation and the separate retained-state client. An independent mathematical/container model checks every public byte after every call. This is bounded example coverage, not exhaustive correctness for every possible state.
The records retain loaded immutable code, completion, register sentinels, full packets, source/tool/firmware hashes and captures. The public gate validates these retained observations and rejects altered evidence; it does not run restricted firmware. No firmware is distributed. The eight displayed bytes are the first eight public fields, zero-padded when shorter; the packet includes every field.
Where it fits
Priority arbitration: Voice ownership and effect priority decide which sound receives an envelope; the envelope alone does not allocate audio hardware.