The TMS9918 family builds a display from tables in video RAM. A name table says which pattern belongs at each screen position. Pattern data supplies the dots, colour data gives them their appearance, and a separate sprite table describes movable objects. The processor updates those tables through the video chip rather than treating video RAM as ordinary memory on its own bus.
The family appears in the TI-99/4A, MSX, ColecoVision and SG-1000. Their CPUs, memory maps and software differ. Sharing a display architecture gives them related graphics constraints, not interchangeable programs.
Modes change what the tables mean
Texas Instruments’ November 1982 manual covers the TMS9918A, TMS9928A and TMS9929A. These are important qualifications to the short name. The A-series includes Graphics II; it should not be silently assigned to the original non-A TMS9918. The listed parts also differ in video output and television timing.
The graphics modes use a 256-by-192-dot picture arranged as 32 by 24 pattern positions. Text mode uses narrower characters, and multicolour mode groups pixels differently. Table interpretation changes with the mode: selecting a mode is not just choosing a resolution and leaving all the same colour rules in place. (TI manual, display organisation and video modes.)
Reusing patterns saves memory. A screen filled with repeated bricks needs many table entries but only one definition of the brick. Animation can change the entries, change the shared pattern, or combine both approaches. The tile graphics entry follows the same principle in later machines.
Thirty-two sprites, four on a line
The sprite table describes up to 32 sprites, but only four can be active on a horizontal line. Extra sprites become transparent on that line, and the status register reports the overflow condition and fifth sprite number. Total object count and per-line capacity are different limits. A scene with many sprites spread vertically may work where a smaller crowd at the same height does not. (TI manual, sprites and status register.)
The processor also has to respect the chip’s access protocol. It sets a video-memory address through the interface, then transfers data through the data port. Automatic address increments make consecutive transfers practical, but interrupt code that also uses the VDP must coordinate access.
Sega’s Master System VDP develops this lineage with a different principal display mode, richer tile attributes and a larger per-line sprite allowance. Its rules belong to that later chip. They should not be read backwards into a TMS9918A program.
Sources
- Texas Instruments, TMS9918A/TMS9928A/TMS9929A Video Display Processors Data Manual, November 1982: the principal programming source for this entry. Original manual.