Nintendo was not the only company making mapper chips for the Famicom. Konami, one of the first companies Nintendo licensed to make its own cartridges, designed a family of its own, the VRCs. Its June 1987 datasheet spells the name out: Virtual ROM Controller. Nintendo’s parts were MMCs, Multi Memory Controllers.
The VRC2 is the second of them, and the VRC4 grew out of it. Both were used in Japanese cartridges, including the Famicom versions of Contra, Gradius II and Teenage Mutant Ninja Turtles. The VRC2 switches graphics in finer pieces than Nintendo’s MMC1 of the same period, and it was designed with a port for saving games to an EEPROM, a memory chip that keeps its contents without a battery. Konami never used the port, and games written for the chip ended up depending on what was left of it.
Fast facts
- Maker: Konami. The datasheet, dated June 1987, calls the part VRC II.
- Package: 40-pin DIP, single 5 V supply.
- Program ROM: up to 256 KB. Two 8 KB windows at
$8000and$A000switch independently;$C000-$FFFFis fixed to the last 16 KB. - Graphics ROM: up to 256 KB, in eight separately switched 1 KB banks.
- Mirroring: vertical or horizontal, chosen by the program.
- No interrupt. The VRC4 added one.
- Save port: a 3-bit output and 1-bit input at
$6000-$6FFF, meant for a serial EEPROM. - iNES mappers: 22, 23 and 25, depending on how the board is wired; the VRC4 shares 21, 23 and 25.
What it does
On the program side, $8000-$9FFF and $A000-$BFFF are separate 8 KB windows, each with a 5-bit bank register, so each can show any of 32 banks. The top 16 KB is fixed to the last two banks of the ROM, so the interrupt vectors and the code that handles them never move. Konami’s datasheet counts ten registers: the two program banks and eight graphics banks.
The graphics side is where the VRC2 differs most from the MMC1. The MMC1 switches pattern memory in 4 KB halves. The VRC2 has eight registers, one for each 1 KB of the PPU’s pattern tables, so a game can change a single group of 64 tiles without disturbing the rest. Nintendo’s MMC3, whose first draft specification dates from December 1987, offered 1 KB and 2 KB banks.
The chip is connected to only five of the CPU’s data lines, so an 8-bit graphics bank number goes in as two 4-bit halves at neighbouring addresses. On the most common wiring the registers sit at these addresses:
| Address | Register |
|---|---|
$8000 |
Program bank at $8000-$9FFF (5 bits) |
$9000 |
Mirroring: 0 = vertical, 1 = horizontal |
$A000 |
Program bank at $A000-$BFFF (5 bits) |
$B000, $B001 |
Graphics bank for PPU $0000: low 4 bits, then high 4 bits |
$B002, $B003 |
Graphics bank for PPU $0400 |
$C000-$C003 |
Graphics banks for $0800 and $0C00 |
$D000-$D003 |
Graphics banks for $1000 and $1400 |
$E000-$E003 |
Graphics banks for $1800 and $1C00 |
Konami’s earlier VRC I, which the datasheet describes only in comparison, had three 4-bit program registers and two 5-bit graphics registers switching 4 KB, and reached 128 KB on each side.
One chip, several boards
The VRC2 tells its registers apart with two of the CPU’s low address lines, and Konami’s boards did not all wire the same two. NESdev lists three layouts. The VRC2b, on several Konami boards, uses the addresses in the table above and is iNES mapper 23. The VRC2a and VRC2c swap the two lines, so the registers appear at $x000, $x002, $x001 and $x003. The VRC2a board (mapper 22) also wires the graphics address lines one place along, so its games write twice the 1 KB bank number and the chip ignores the lowest bit.
Mapper numbers are an emulator-community convention that no manufacturer used. They exist to tell apart cartridges that differ only in their wiring, and the VRC family, with one chip on many boards, is why several numbers cover it. NESdev’s examples include TwinBee 3 and Ganbare Pennant Race on the VRC2a, Wai Wai World on the VRC2b and Ganbare Goemon Gaiden on the VRC2c.
The save port that became a latch
Konami’s datasheet lists a built-in EEPROM controller among the chip’s features. What it describes is simpler than the name. A write to $6000-$6FFF sets three output pins, which drive the chip-select, clock and data-in lines of a serial EEPROM, and a read returns the EEPROM’s data-out line on bit 0. The chip implements no protocol. A game would have to clock every command, address and data bit through the port itself, and the datasheet sends the reader to the memory maker’s own data sheet for the format.
NESdev reports that Konami never used it, apparently because of a fault in the chip. On the boards that shipped, the data-out pin is tied to ground, left floating or connected to the data-in pin. On boards wired the last way, the port works as a one-bit latch: bit 0 reads back whatever was last written. Some games, including the Famicom Contra and Ganbare Goemon 2, check that it does, and lock up almost immediately if it does not. An emulator therefore has to provide the latch even though nothing in a game uses it to save.
Nintendo’s saving cartridges of the time kept their saves in battery-backed RAM. An EEPROM needs no battery but is slower and has to be driven entirely in software. Konami built for that choice in 1987, and its games went on without it.
The VRC4
NESdev describes the VRC2 as mostly a subset of the VRC4, and emulators often treat both as a VRC4. The VRC4:
- reaches 512 KB of graphics ROM;
- adds a mode that swaps which of
$8000and$C000is switchable, with the other fixed to the second-last 8 KB bank; - adds one-screen mirroring;
- has an interrupt counter, the design several of Konami’s later VRCs share;
- drops the EEPROM port and adds a switch that enables or disables work RAM.
NESdev’s list of VRC4 games includes Wai Wai World 2, Gradius II, Teenage Mutant Ninja Turtles and Tiny Toon Adventures (the last three in their Japanese releases), Ganbare Goemon Gaiden 2, Bio Miracle Bokutte Upa and Boku Dracula-kun. Konami wired the VRC4 in five layouts of its own. iNES mappers 21, 23 and 25 each accept two address layouts at once, which is how one number can serve both VRC2 and VRC4 games.
Konami called the PPU the VDP
Throughout its datasheet Konami calls the Famicom’s picture chip the VDP, video display processor, and not the PPU, Nintendo’s name. VDP was the term for the Texas Instruments TMS9918 and its compatibles, the video chip of the MSX computers, for which Konami was writing cartridges at the same time.
Sources
- NESdev Wiki, “VRC2 and VRC4” (community reference, web, secondary): the meaning of VRC; bank layout and sizes; the register addresses and bit layouts; the board variants and their mapper numbers; example games; the VRC2 and VRC4 differences; the EEPROM interface, the fault that left it unused, the board wiring of its data pin, the one-bit latch and the games that depend on it. https://www.nesdev.org/wiki/VRC2_and_VRC4
- Konami, Family Computer Virtual ROM Controller II datasheet, June 1987 (unpublished internal document): the name; the VRC I comparison; the feature list, including the EEPROM controller; the 40-pin package and 5 V supply; the ten registers; the five data lines; the EEPROM port’s pins and its reference to the memory maker’s data sheet; the term VDP. Every other statement in this entry stands on the public sources.
- Nintendo, MMC3 Specification, provisional draft of 15 December 1987 (unpublished licensee document), as cited in the MMC3 entry: the date of the MMC3’s first draft.