A level does not need to be on screen for the game to ask what is there. Give it a byte per cell, keep those bytes in row order, and the same map can answer questions about walls, hazards, goals or scenery that has changed.
This implementation supplies four routines: checked get, checked set, property lookup and conversion from unsigned world positions to eight-unit cells. It does not draw or wait for a frame. The shared entry explains the arrangement and links the implementations across all 30 machines.
Include and initialise
Define TM as the start of a reserved 20-byte context, then include the routine. The map contains W×H consecutive bytes, with width and height each from 1 to 255. Its property table contains one byte per possible ID, through the configured highest ID. Both ranges must remain addressable without crossing an address-space end, bank window or unmapped boundary. Use writable RAM for tile_set; a ROM map needs another way to record changes.
The 6502 context must fit entirely in zero page, and decimal mode must be clear.
Context offsets: 0–1 map pointer; 2/3 width/height; 4/5 column/row; 6 tile; 7 valid; 8–10 scratch; 11 property; 12–13 property pointer; 14 highest tile ID; 15 scratch; 16–17 X; 18–19 Y. Initialise the pointers, dimensions and highest ID before a call. Scratch bytes belong to the routine.
Initialise the diagnostic map and make its first checked query
start:
sei
cld
ldx #$ff
txs
lda #0
ldx #19
clear_context:
sta TM,x
dex
bpl clear_context
ldx #34
copy_map:
lda initial_map,x
sta MAP,x
dex
bpl copy_map
lda #$a5
sta MAP+35
lda #<MAP
sta TM
lda #>MAP
sta TM+1
lda #7
sta TM+2
lda #5
sta TM+3
lda #3
sta TM+14
lda #<properties
sta TM+12
lda #>properties
sta TM+13
lda #0
sta TM+4
lda #0
sta TM+5
jsr tile_get
lda TM+7
cmp #1
beq valid_0
lda #255
sta TM+6The diagnostic selects the full Atom model. Its combined 24 KiB synthetic ROM puts the caller at $C000; results at $0400 and the map at $04F0 stay in low RAM. No BASIC or screen workspace is preserved. The context occupies $0070–$0083; the 6502 stack uses page one. Reserve those locations too.
Acorn’s Atom Technical Manual, memory map, p. 20 marks $0400–$27FF for Eurocards. This fixture uses the emulator’s full RAM configuration; those locations are not a spare-RAM recommendation for a stock Atom. Check the memory actually fitted before choosing a map address.
Call the routine
Set column and row, call tile_get, then check the valid byte. A successful call returns the tile ID. Failure returns valid=0 and tile=0, so tile zero alone does not mean success. This compact variant uses unsigned byte coordinates; wider maps can use a wider-coordinate variant rather than treating this as a machine limit. Translate a signed or wider world into this representation explicitly.
For a write, set column/row/tile and call tile_set. Invalid coordinates or an ID above the configured maximum leave the map unchanged. To classify a tile, call tile_property; it returns the table byte and a separate valid flag. Your game decides whether those property bits mean blocking, damage, a goal or something else.
Reusable 6502 map/query implementation
; Byte map, caller-owned zero-page context TM..TM+19. See README.md.
; A/X/Y/flags clobbered. Decimal flag must be clear. No IRQ/stack ownership.
tile_locate:
lda #0
sta TM+7
lda TM+4
cmp TM+2
bcs tile_locate_done
lda TM+5
cmp TM+3
bcs tile_locate_done
lda TM
sta TM+8
lda TM+1
sta TM+9
lda TM+5
sta TM+10
beq tile_column
tile_rows:
clc
lda TM+8
adc TM+2
sta TM+8
bcc tile_no_carry
inc TM+9
tile_no_carry:
dec TM+10
bne tile_rows
tile_column:
clc
lda TM+8
adc TM+4
sta TM+8
bcc tile_address_ready
inc TM+9
tile_address_ready:
lda #1
sta TM+7
tile_locate_done:
rts
tile_get:
jsr tile_locate
lda TM+7
beq tile_get_invalid
ldy #0
lda (TM+8),y
sta TM+6
rts
tile_get_invalid:
lda #0
sta TM+6
rts
tile_set:
lda #0
sta TM+7
lda TM+6
cmp TM+14
bcc tile_set_id_ok
beq tile_set_id_ok
rts
tile_set_id_ok:
jsr tile_locate
lda TM+7
beq tile_set_done
ldy #0
lda TM+6
sta (TM+8),y
tile_set_done:
rts
tile_property:
lda #0
sta TM+7
sta TM+11
lda TM+6
cmp TM+14
bcc tile_property_ok
beq tile_property_ok
rts
tile_property_ok:
tay
lda (TM+12),y
sta TM+11
lda #1
sta TM+7
rts
; Unsigned 16-bit world X/Y -> eight-unit cells. Does not mutate X/Y.
tile_pixel8:
lda #0
sta TM+7
sta TM+6
lda TM+16
sta TM+4
lda TM+17
sta TM+15
ldx #3
tile_shift_x:
lsr TM+15
ror TM+4
dex
bne tile_shift_x
lda TM+15
bne tile_pixel_done
lda TM+18
sta TM+5
lda TM+19
sta TM+15
ldx #3
tile_shift_y:
lsr TM+15
ror TM+5
dex
bne tile_shift_y
lda TM+15
bne tile_pixel_done
jsr tile_get
tile_pixel_done:
rtsFor tile_pixel8, set unsigned 16-bit X and Y in world coordinates. It divides by eight, rejects a cell coordinate too large for a byte, then performs the checked lookup. Read cell/tile outputs only after checking valid. X/Y inputs remain unchanged. Eight-unit square cells are this routine’s deliberate fast conversion; other sizes, wrapping or a signed origin need a corresponding variant.
State, stack and cost
A, X, Y and flags are clobbered. The routines use the current stack and the supplied context. They do not mask or install interrupts. An interrupt caller needs its own context and must preserve the state that the interrupted code needs.
Get/set use 4 bytes of return addresses at their deepest point, including the direct caller’s call into the library. Pixel conversion uses 6; property lookup uses 2. Add the surrounding caller stack and any interrupt frames.
Map storage is W×H bytes, plus highest-ID+1 property bytes, context, code and stack. This readable version adds the row width repeatedly; later rows cost more work. Row-pointer tables or fixed-width shifts are alternatives when query speed matters. There is no whole-game frame-rate claim.
Make it your own
Close an exit by changing its property byte. In this caller, bit 0 (value 1) means blocking, bit 1 (2) means hazard and bit 2 (4) means exit. These meanings belong to the example, not to the library. Tile 3 starts as an open exit:
Before: tile 3 has the exit flag
; Bits chosen by this caller: 1 blocking, 2 hazard, 4 exit.
!byte 0,1,2,4The maintained customisation keeps the exit flag and adds blocking, so 4 becomes 5:
After: tile 3 is a closed exit
; Close the exit: tile 3 keeps exit bit 4 and gains blocking bit 1.
!byte 0,1,2,5Use the second table in place of the first in your own caller. make VARIANT=closed-exit ASM198X=/path/to/asm198x builds that variant of this diagnostic. The checked read still returns tile 3, while tile_property now returns 5 instead of 4. Your collision rules must interpret the blocking bit; this routine only supplies the classification.
Both versions ran on this machine. All other 43 result bytes match, and their complete ROM fixtures differ in exactly one data byte. The property table stays four bytes; the code and scratch-memory requirements stay the same. This edit changes data at build time. To change the table during play, put it in writable RAM and initialise its pointer accordingly.
Change dimensions, map data and property meanings together. A solid wall might have property bit 0 set, a hazard bit 1; a tile can carry both. Keep classification separate from artwork so recolouring or changing a character does not change the rules.
The offset is row × width + column. A 7×5 room exposes width/height swaps, and the fixture deliberately crosses a 256-byte boundary to exercise pointer carry. World-to-cell conversion divides by eight and rounds down: world X=23 belongs to column 2. It is a direct use of the coordinate and representation ideas in Maths for Games. Logical cells need not be eight physical screen pixels; choose and document your units.
For a busy game, row-pointer tables avoid repeated additions at the cost of two bytes per row. Packed tile IDs save map RAM but need extra work to extract and update a cell. Larger or signed worlds need a corresponding coordinate variant. These are possible extensions, not timings measured for this caller.
When it goes wrong
| Symptom | Cause | Fix |
|---|---|---|
| The first row works, later rows read the wrong tiles | Address arithmetic uses stride 6 for a seven-wide map | Add the map width, independently of the screen layout |
| A rejected edit corrupts a map cell or its neighbour | The write ignores the failed coordinate check | Retain the early return in tile_set and check valid in the caller |
| Empty floor behaves like an invalid position | Tile zero is used as the success flag | Read the separate valid byte |
Both faulty stride and faulty write variants ran to completion in this machine’s emulator. At column 0, row 1, the stride fault returns tile 2 instead of 3. Removing the invalid-write guard changes the diagnostic’s unchanged-map/guard result from 1 to 0. The third row explains the interface contract; it is not an additional executed fault. The records contain actual RAM bytes rather than a screenshot of a display this test never draws.
A wrong stride, and its correction
Deliberately broken: this executed variant advances six bytes for each seven-cell row.
Deliberately broken stride
tile_rows:
clc
lda TM+8
adc #6
sta TM+8
bcc tile_no_carry
inc TM+9Use the configured map width, keeping carry into the high address byte:
Correct stride
tile_rows:
clc
lda TM+8
adc TM+2
sta TM+8
bcc tile_no_carry
inc TM+9A rejected write that still stores
Deliberately broken: this executed variant reaches the store even when tile_locate leaves valid at zero.
Deliberately broken write guard
tile_set_id_ok:
jsr tile_locate
lda TM+7
ldy #0
lda TM+6
sta (TM+8),yRestore the early return. Rerun the normal caller: its unchanged-map/guard result must return to 1, and its completion byte must still reach 239.
Correct write guard
tile_set_id_ok:
jsr tile_locate
lda TM+7
beq tile_set_done
ldy #0
lda TM+6
sta (TM+8),yRun and adapt it
make ASM198X=/path/to/asm198x builds an original reset ROM fixture. The maintained verifier runs it in Emu198x, checks all 44 result bytes against explicit expected map rows, checks the closed-exit customisation, then builds and rejects the two faulty variants. The shared routine is unchanged from the other 6502 implementations.
Executed with Asm198x 0.0.71 and Emu198x 0.44.1. This qualifies the CPU code and declared RAM layout. It does not establish stock BASIC loading, display output, interrupt coexistence or a frame deadline. The diagnostic replaces firmware and takes over the machine; a game using firmware must reserve suitable memory and supply its own loading and interrupt policy.
- Complete caller, build command and execution records
- Reusable 6502 implementation and calling contract
The BASIC map entry solves the same problem with interpreter-managed arrays. Its loader, indexing and costs are qualified separately.