VRC II

Nintendo was not the only company making mapper chips for the Famicom. Konami — a publisher large enough to justify its own silicon — designed a parallel family, and where Nintendo’s parts are MMCs, Memory Management Controllers, Konami’s are VRCs: Virtual ROM Controllers.

The VRC II is the second of them, and the one Konami documented most fully. It does the same job as an MMC1 of the same period — more program and character ROM than the console can address, plus software-controlled mirroring — but arrives at it differently, and adds something no Nintendo mapper of the era had.

Fast facts

Manufacturer: Konami.
Datasheet: June 1987.
Package: 40-pin DIP, single +5 V supply, TTL-compatible pins.
PRG ROM: up to 256 KB — two switchable 8 KB windows, plus a fixed 16 KB.
CHR ROM: up to 256 KB, in eight separately switchable 1 KB banks.
Mirroring: software-controlled, changeable mid-game.
No IRQ. Like MMC1 and unlike MMC3, the VRC II has no scanline counter. Later VRCs added one.
Extra: an on-chip port for driving a serial EEPROM.

What it does

The program side is the conventional arrangement of the day: $8000-$BFFF is two independently switchable 8 KB windows, and $C000-$FFFF is fixed — hard-wired to the last two banks of a full-size ROM, so the interrupt vectors are always reachable no matter what is banked in below. The shape of that fixed region is a small departure: Nintendo’s parts of the period pin one 8 KB bank at the top and another elsewhere, where Konami pins a contiguous 16 KB.

The character side is where the VRC II is more generous than its Nintendo contemporary. MMC1 switches character memory in two 4 KB halves. The VRC II gives eight separate 1 KB banks, each with its own register — four times the granularity, which is what you want for animating small parts of a tileset without disturbing the rest. MMC3 would eventually offer something comparable; in 1987 this was ahead of it.

One quirk of the interface: the chip only receives five bits of the data bus, so an 8-bit character bank number is written as two 4-bit halves, to consecutive addresses.

The EEPROM port that isn’t a controller

The datasheet lists a built-in EEPROM controller among the VRC II’s features, which oversells it in an interesting way.

What the chip provides is a three-bit output latch and a one-bit input path: three bits drive the chip-select, clock and data-in lines of a serial EEPROM, and reads return its data-out. There is no command set, no address sequencing, no waiting for a write to finish. Every one of those is the game’s job, bit-banged in software — the datasheet says as much, and sends the reader to the memory manufacturer’s own documentation for the protocol.

That is a different bet from Nintendo’s. Nintendo’s saving cartridges used battery-backed RAM: fast, few moving parts, and dependent on a lithium cell that would eventually die. An EEPROM keeps its contents with no battery at all, at the cost of being far slower and needing a software driver for every access. Konami built the hooks for the batteryless approach into the mapper itself.

Why one chip has several mapper numbers

Emulators list the VRC II under more than one number, which looks like confusion and isn’t.

The chip decodes only a couple of low address lines to tell its registers apart. Which cartridge address lines a board connects to those pins is a decision made on the board, not in the chip — so two cartridges carrying the identical part can expect their registers at different addresses. Konami’s datasheet specifies the chip’s pins; it has nothing to say about what any particular board did with them, because that was never the chip’s business.

Mapper numbers are an emulator-community invention in any case. No manufacturer document, Nintendo’s or Konami’s, uses them — they exist because emulator authors needed to tell cartridges apart from the outside, which is exactly the problem the board wiring creates.

Konami called the PPU the VDP

A small detail, and a revealing one. Throughout its datasheet Konami refers to the NES’s graphics chip not as the PPU but as the VDP — Video Display Processor.

That is not Nintendo’s word. It is MSX and TMS9918 vocabulary, from the standard Konami was simultaneously one of the largest developers for. The house language travelled with the engineers between platforms, and turns up in an internal document with no reason to use anyone else’s terms. It is a small piece of evidence for something otherwise hard to see: the same people were writing for both machines, and did not switch dialects when they changed desks.

Sources

The mapper numbering, address-line wiring and general behaviour above follow the NESdev Wiki’s VRC2 and VRC4 page, whose content is public domain and which remains the best place to check any of it.

⚠ Two sections here lean on something you cannot check: Konami’s own VRC II datasheet of June 1987, an internal document written for its own cartridge engineers and never publicly released. The EEPROM port that isn’t a controller and Konami called the PPU the VDP both rest on it, and both would go if it were struck. We describe what the datasheet says and do not reproduce it — but unlike the other pages in this set, those two sections are the datasheet’s contribution rather than a gloss on public material, and that is worth knowing when weighing them.

Konami's answer to the MMC